CS 232: Lab 1
Appendix B: Quartus Prime Tutorial
Technology, Management, Business, etc.: Declaring Virtual Pins in Quartus
Quartus II Introduction Using Verilog Design
Quartus II Introduction for Verilog Users
Quartus II Version 6.1 Handbook, Volume 2: Design Implementation & Optimization
Technology, Management, Business, etc.: Declaring Virtual Pins in Quartus
Quick Quartus with Verilog
Intel Quartus Prime Standard Edition User Guide: Design Constraints
Talking to the DE0-Nano using the Virtual JTAG interface.
compilation - Why is my design compiled by Quartus II successfully but no logic utilization? - Stack Overflow
Using Virtual Pins
Technology, Management, Business, etc.: Declaring Virtual Pins in Quartus
compile/verify
Quartus II Introduction Using Schematic Design
3.3.2. I/O Assignments with the Intel® Quartus® Prime Assignment...
Introduction to Quartus by a VHDL based Design
fpga - How to create Verilog or VHDL from a Quartus design - Electrical Engineering Stack Exchange
6. Pin Assignments: Making them Spot On! - Programmable logic design using schematic entry design tools | Coursera
Quartus II Introduction for Verilog Users
I never had an Intel 8080 • JeeLabs
CS 232: Lab 1
Experiment Sheet - FPGA design Part 1 v4_1
Step by Step Guide to Making a 3 Bit Counter in Quartus
Feedback Controllers - Making Hardware with Firmware. Part 5. Some FPGA Aspects. - Steve Maslen
